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China’s CXMT Says Server DRAM With 4F² Design Due This Year”

China’s CXMT said it plans to introduce server DRAM using a denser 4F² memory-cell design by the end of 2026.

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Fabio gore

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China’s CXMT Says Server DRAM With 4F² Design Due This Year”

A data center can contain thousands of servers, each depending on memory to hold information that processors need to access quickly. As AI applications grow, the industry is looking for ways to store more data within limited physical space while maintaining performance, reliability, and reasonable costs. Some of the most consequential changes in computing begin not with a new application, but with a smaller structure inside a silicon chip.

China’s ChangXin Memory Technologies, commonly known as CXMT, has reported progress on a new dynamic random-access memory architecture called 4F². According to a report published by Seoul Economic Daily on October 12, 2026, the company plans to introduce a server DRAM product using the design by the end of the year. The announcement has drawn attention because the architecture could allow more memory cells to fit within a given chip area.

DRAM is a type of volatile memory widely used in computers and servers. It stores information temporarily while a system is operating, allowing processors to retrieve data much faster than they generally could from long-term storage. Server memory must also meet demanding requirements for reliability and data integrity because enterprise systems may run continuously and handle large volumes of transactions.

The term 4F² refers to the area associated with an individual memory cell, expressed in relation to a minimum feature dimension known as F. Compared with the conventional 6F² arrangement, a 4F² structure can theoretically reduce the area needed for each cell. That could make it possible to increase memory density without expanding the overall chip footprint by the same proportion.

Seoul Economic Daily reported that the architecture could reduce cell area by approximately one-third compared with the 6F² design. In practical terms, a denser arrangement could allow manufacturers to fit more memory capacity into a similar amount of silicon. This matters for server systems, where memory capacity influences how workloads are distributed, how much information can be kept close to processors, and how efficiently computing resources are used.

CXMT’s reported plans are significant because server DRAM is a demanding market. Memory used in data centers must meet strict requirements for stability, power characteristics, compatibility, and performance. Developing a new cell structure is only one part of the process; manufacturers must also demonstrate that the technology can be produced consistently at commercial scale.

South Korean memory manufacturers Samsung Electronics and SK Hynix have also been exploring advanced DRAM architectures. Their work illustrates how competitive the field has become as AI infrastructure increases demand for memory. CXMT’s reported development could intensify competition, but the announcement alone does not establish that its technology is superior to existing products or that it can be manufactured at comparable yields.

There is a substantial difference between demonstrating a design and delivering a dependable product in large quantities. Semiconductor manufacturers must manage manufacturing variation, defects, production costs, packaging, testing, and customer qualification. A technology that offers higher theoretical density may still face obstacles if it cannot achieve reliable yields or meet the performance expectations of server operators.

The timing also matters for the wider memory market. AI systems are placing new demands on memory capacity and bandwidth, while data-center operators seek to balance performance against the cost of infrastructure. If CXMT successfully commercializes its architecture, it could eventually give customers another source of server memory and add competitive pressure to established suppliers. The scale of that impact will depend on product availability and demonstrated performance.

For now, CXMT’s announcement is best viewed as a meaningful technical development rather than proof that the global memory hierarchy is about to change. The semiconductor industry has repeatedly shown that progress depends on turning promising engineering into consistent manufacturing. In a market where tiny structures can influence the capacity of entire data centers, the next milestone will be measured not only by the design itself, but by whether it works reliably in the real world.

AI Image Disclaimer: Any AI-generated illustration is a conceptual representation of semiconductor research and DRAM manufacturing. It does not depict an actual CXMT chip, factory process, or independently verified performance result.

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